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@@ -58,6 +58,9 @@
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#include <linux/dmi.h>
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#include <linux/dmi.h>
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#include <linux/acpi.h>
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#include <linux/acpi.h>
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#include <linux/io.h>
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#include <linux/io.h>
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+#include <linux/delay.h>
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+
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+#include "gpioregs.h"
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#define DRVNAME "it87"
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#define DRVNAME "it87"
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@@ -569,6 +572,150 @@ static struct kobject *fan_kobj = NULL;
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struct device *dev_it87 = NULL;
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struct device *dev_it87 = NULL;
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+static int wait_ibf(void)
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+{
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+ int i = 0;
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+ while (inb(EC_CMD_PORT) & EC_IBF)
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+ {
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+ if (++i > TIMEOUT_LOOPS)
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+ {
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+ return -1;
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+ }
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+ udelay(1);
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+ }
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+ return 0;
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+}
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+
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+static int wait_obf(void)
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+{
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+ int i = 0;
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+ while (!(inb(EC_CMD_PORT) & EC_OBF))
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+ {
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+ if (++i > TIMEOUT_LOOPS)
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+ {
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+ return -1;
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+ }
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+ udelay(1);
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+ }
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+ return 0;
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+}
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+
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+static int ec_read_ram(uint8_t offset, uint8_t *data)
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+{
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+ if (wait_ibf() < 0)
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+ return -1;
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+ outb(CMD_READ_RAM, EC_CMD_PORT);
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+
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+ if (wait_ibf() < 0)
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+ return -1;
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+ outb(offset, EC_DATA_PORT);
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+
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+ if (wait_obf() < 0)
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+ return -1;
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+ *data = inb(EC_DATA_PORT);
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+
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+ return 0;
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+}
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+
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+static int ec_write_ram(uint8_t offset, uint8_t data)
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+{
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+ if (wait_ibf() < 0)
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+ return -1;
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+ outb(CMD_WRITE_RAM, EC_CMD_PORT);
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+
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+ if (wait_ibf() < 0)
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+ return -1;
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+ outb(offset, EC_DATA_PORT);
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+
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+ if (wait_ibf() < 0)
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+ return -1;
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+ outb(data, EC_DATA_PORT);
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+
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+ return 0;
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+}
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+
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+static int oem_ec_read_ram(uint8_t page, uint8_t offset, uint8_t *data)
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+{
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+ unsigned char WEC, REC;
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+ switch(page)
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+ {
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+ case 0:
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+ {
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+ WEC = 0x96;
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+ REC = 0x95;
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+ break;
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+ }
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+
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+ case 1:
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+ {
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+ WEC = 0x98;
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+ REC = 0x97;
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+ break;
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+ }
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+
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+ default:
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+ {
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+ WEC = 0x81;
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+ REC = 0x80;
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+ break;
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+ }
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+ }
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+ if (wait_ibf() < 0)
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+ return -1;
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+ outb(REC, EC_CMD_PORT);
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+
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+ if (wait_ibf() < 0)
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+ return -1;
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+ outb(offset, EC_DATA_PORT);
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+
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+ if (wait_obf() < 0)
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+ return -1;
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+ *data = inb(EC_DATA_PORT);
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+
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+ return 0;
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+}
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+
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+static int oem_ec_write_ram(uint8_t page, uint8_t offset, uint8_t data)
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+{
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+ unsigned char WEC, REC;
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+ switch(page)
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+ {
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+ case 0:
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+ {
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+ WEC = 0x96;
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+ REC = 0x95;
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+ break;
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+ }
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+
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+ case 1:
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+ {
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+ WEC = 0x98;
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+ REC = 0x97;
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+ break;
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+ }
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+
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+ default:
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+ {
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+ WEC = 0x81;
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+ REC = 0x80;
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+ break;
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+ }
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+ }
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+ if (wait_ibf() < 0)
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+ return -1;
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+ outb(WEC, EC_CMD_PORT);
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+
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+ if (wait_ibf() < 0)
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+ return -1;
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+ outb(offset, EC_DATA_PORT);
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+
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+ if (wait_ibf() < 0)
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+ return -1;
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+ outb(data, EC_DATA_PORT);
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+
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+ return 0;
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+}
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+
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int vid_from_reg(int val, u8 vrm)
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int vid_from_reg(int val, u8 vrm)
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{
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{
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int vid;
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int vid;
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@@ -3871,6 +4018,49 @@ static ssize_t temp2_input_store(struct kobject *kobj, struct kobj_attribute *at
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return -EINVAL;
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return -EINVAL;
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}
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}
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+
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+static ssize_t power_flag_show(struct kobject *kobj, struct kobj_attribute *attr,
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+ char *buf)
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+{
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+ return -EINVAL;
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+ // int nr = 1;
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+ // int index = 0;
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+ // struct it87_data *data = it87_update_device(dev_it87);
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+
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+ // return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index])/1000);
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+}
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+
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+static ssize_t power_flag_store(struct kobject *kobj, struct kobj_attribute *attr,
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+ const char *buf, size_t count)
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+{
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+ return -EINVAL;
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+}
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+
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+
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+static ssize_t ac_power_show(struct kobject *kobj, struct kobj_attribute *attr,
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+ char *buf)
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+{
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+ int ac_power_flag = 0;
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+ uint8_t val = 0x00;
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+ if (oem_ec_read_ram(2, 0x36, &val) < 0)
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+ return -1;
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+ ac_power_flag = (val & 0x03) ? 1 : 0;
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+
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+ return sprintf(buf, "%d", ac_power_flag);
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+}
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+
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+static ssize_t ac_power_store(struct kobject *kobj, struct kobj_attribute *attr,
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+ const char *buf, size_t count)
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+{
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+ return -EINVAL;
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+}
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+
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+static struct kobj_attribute power_flag =
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+ __ATTR(power_flag, 0644, power_flag_show, power_flag_store);
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+
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+static struct kobj_attribute ac_power =
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+ __ATTR(ac_power, 0644, ac_power_show, ac_power_store);
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+
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static struct kobj_attribute temp1_input =
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static struct kobj_attribute temp1_input =
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__ATTR(temp1_input, 0644, temp1_input_show, temp1_input_store);
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__ATTR(temp1_input, 0644, temp1_input_show, temp1_input_store);
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@@ -3907,6 +4097,8 @@ static struct attribute *fan_attrs[] = {
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&pwm2_enable.attr,
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&pwm2_enable.attr,
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&temp1_input.attr,
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&temp1_input.attr,
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&temp2_input.attr,
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&temp2_input.attr,
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+ &power_flag.attr,
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+ &ac_power.attr,
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NULL,
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NULL,
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};
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};
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